This article provides details on how to upgrade FPC I2CS CPLD on QFX5700 box :

Alarm seen on box: 

labroot@jtac-qfx5700-r2003-re0-re0> show chassis alarms 
1 alarms currently active
Alarm time               Class  Description
2025-02-03 13:30:13 IST  Minor  FPC 3 FPC I2CS CPLD minimum supported firmware version mismatch

Device Details:

root@jtac-qfx5700-r2003-re0-re0> show version
Hostname: jtac-qfx5700-r2003-re0-re0
Model: qfx5700
Junos: 23.4R2-S1.7-EVO
Yocto: 3.0.2
Linux Kernel: 5.2.60-yocto-standard-gbbed0c6
JUNOS-EVO OS 64-bit [junos-evo-install-qfx-ms-x86-64-23.4R2-S1.7-EVO]

STEP 1 :

Initiate the upgrade using the below command: 

labroot@jtac-qfx5700-r2003-re0-re0> request system firmware upgrade fpc i2cs-fpga slot 3
Upgrade initiated. Please check status using show system firmware cmd. When programming finishes for all initiated upgrades, please power cycle system to load/see new version.

STEP 2

Validate if the upgrade is set :

labroot@jtac-qfx5700-r2003-re0-re0> show system firmware
Part       Type        Tag               Current   Available   Status
version    version
PSM 0      PSM MCU AC  0  0212.0214   0212.0216   OK
PSM 1      PSM MCU AC  0  0212.0214   0212.0216   OK
RE 0       Control FPGA 0  210629.63  210629.63    OK
RE 0       SSD Primary 5  A20722J     A20722J      OK
RE 0       SSD Secondary 6 A20722J   A20722J      OK
RE 0       BOOT CPLD 3   01.6f      01.6f        OK
RE 0       BIOS ROM 4    12.01      16.01        OK
RE 0       RE DPLL 9     7006       OK
FPC 3      FPC FPGA 0    210823.35  210823.35    OK
FPC 3      FPC I2CS CPLD 1 00.2C   00.2D        PROGRAMMING
FPC 3      FPC DPLL 9    6022       7006         OK
FAN 0      FTC FPGA 0    1.9        1.9          OK
FAN 1      FTC FPGA 0    1.9        1.9          OK
FEB 0      FEB FPGA 0    210913.1F  210913.1F    OK
FEB 0      FEB I2CS CPLD 1 00.27   00.27        OK
FEB 0      BCM TD4 Flash 2 2.10    2.10         OK
FEB 0      FEB DPLL 9    6022       7006         OK

labroot@jtac-qfx5700-r2003-re0-re0> show system firmware
Part       Type        Tag               Current   Available   Status
version    version
PSM 0      PSM MCU AC  0  0212.0214   0212.0216   OK
PSM 1      PSM MCU AC  0  0212.0214   0212.0216   OK
RE 0       Control FPGA 0  210629.63  210629.63    OK
RE 0       SSD Primary 5  A20722J     A20722J      OK
RE 0       SSD Secondary 6 A20722J   A20722J      OK
RE 0       BOOT CPLD 3   01.6f      01.6f        OK
RE 0       BIOS ROM 4    12.01      16.01        OK
RE 0       RE DPLL 9     7002       7006         OK
FPC 3      FPC FPGA 0    210823.35  210823.35    OK
FPC 3      FPC I2CS CPLD 1 00.2C   00.2D        UPGRADED SUCCESSFULLY
FPC 3      FPC DPLL 9    6022       7006         OK
FAN 0      FTC FPGA 0    1.9        1.9          OK
FAN 1      FTC FPGA 0    1.9        1.9          OK
FEB 0      FEB FPGA 0    210913.1F  210913.1F    OK
FEB 0      FEB I2CS CPLD 1 00.27   00.27        OK
FEB 0      BCM TD4 Flash 2 2.10    2.10         OK
FEB 0      FEB DPLL 9    6022       7006         OK

STEP-3

Once the status shows as "upgraded successfully" . Power-cycle the whole box 

Validation:

{master}

root@jtac-qfx5700-r2003-re0-re0> show system firmware

Part             Type                Tag    Current Version       Available Version    Status

------------------------------------------------------------------------------------------

PSM 0            PSM MCU AC          0      0212.0214             0212.0216            OK

PSM 1            PSM MCU AC          0      0212.0214             0212.0216            OK

RE 0             Control FPGA        0      210629.63             210629.63            OK

RE 0             SSD Primary         5      A20722J               A20722J               OK

RE 0             SSD Secondary       6      A20722J               A20722J               OK

RE 0             BOOT CPLD           3      01.6f                 01.6f                 OK

RE 0             BIOS ROM            4      12.01                 16.01                 OK

RE 0             RE DPLL             9      7006                  7006                 OK

FPC 3            FPC FPGA            0      210823.35             210823.35            OK

FPC 3            FPC I2CS CPLD       1      00.2D                 00.2D                 OK

FPC 3            FPC DPLL            9      6022                  7006                 OK

FAN 0            FTC FPGA            0      1.9                   1.9                   OK

FAN 1            FTC FPGA            0      1.9                   1.9                   OK

FEB 0            FEB FPGA            0      210913.1F             210913.1F            OK

FEB 0            FEB I2CS CPLD       1      00.27                 00.27                 OK

FEB 0            BCM TD4 Flash       2      2                      2.10                 OK

FEB 0            FEB DPLL            9      6022                  7006                 OK

IMPORTANT NOTE:

Initiate a hard power-cycle of the box and not " request system reboot"