This article will explain about below PICE error reported on MX with SCBE2.
SGLINK(RD-err): PCIE error [0x23] at device
In an MX platform below error msg can be seen:
Oct 15 00:44:06 MX_960 chassisd[68031]: %DAEMON-6: XFCHIP[1]: post init successful xfchip_init_hw
Oct 15 00:44:06 MX_960 chassisd[68031]: %DAEMON-3: XFCHIP_IOERR 1: read 0x484bfc -> 0 failed
Oct 15 00:44:06 MX_960 kernel: %KERN-3: SGLINK(RD-err): PCIE error [0x23] at device 0, address 0xc84bfc, unexpected TLP, mal-formed TLP, bad RX completion TLP
Oct 15 00:44:06 MX_960 kernel: %KERN-3: SGLINK(RD-err): PCIE RX TLP[0] data 0x001e001e
Oct 15 00:44:06 MX_960 kernel: %KERN-3: SGLINK(RD-err): PCIE RX TLP[1] data 0x001e001e
Oct 15 00:44:06 MX_960 kernel: %KERN-3: SGLINK(RD-err): PCIE RX TLP[2] data 0x001e001e
Oct 15 00:44:06 MX_960 kernel: %KERN-3: SGLINK(RD-err): PCIE RX TLP[3] data 0x001e001e
Oct 15 00:44:06 MX_960 kernel: %KERN-3: SGLINK(RD-err): PCIE TX TLP[0] data 0x00000001
Oct 15 00:44:06 MX_960 kernel: %KERN-3: SGLINK(RD-err): PCIE TX TLP[1] data 0x00000d0f
Oct 15 00:44:06 MX_960 kernel: %KERN-3: SGLINK(RD-err): PCIE TX TLP[2] data 0x01c84bfc
Oct 15 00:44:06 MX_960 kernel: %KERN-3: SGLINK(RD-err): PCIE TX TLP[3] data 0x00000000
SGBus are low-speed, parallel, and bidirectional buses that are used to carry control information from the Control Board (CB) to the other Field Replaceable Units (FRUs), including the backup CB.
SGLINK is a serialized version of SGBus
In log messages we will see PCIE errors also we will see the CB alarm as below
2 alarms currently active
Alarm time Class Description
2024-10-15 01:34:27 UTC Minor CB 0 Fabric Chip 1 Not Online
2024-10-15 01:34:26 UTC Minor CB 0 Fabric Chip 0 Not Online
This could be a transient hardware issue, need to restart the CB which reporting this error.
If the issue does not resolve with a CB restart, please contact JTAC support.