ZTCHIP_CMERROR_MCIF_RX_ECC5_PROTECT_FSET_REG_DETECTED_LINK2_PBC_RESP_DATA_FIFO0_0 (0x3601d7) are a transient memory parity errors observed in the ZT chips.

Below logs may bee seen on the router for the impacted FPC's PFE.

Sep 10 21:53:35 M480-02 fpc2 ztchip_mcif_rx_ecc5_protect_intr_handler(8356): ZT[0:0]: MCIF Rx: ECC Protect 5: Multiple Errors 0x100000 
Sep 10 21:53:35 M480-02 fpc2 CMError: /fpc/2/pfe/0/cm/0/ZT[0:0]/0/ZTCHIP_CMERROR_MCIF_RX_ECC5_PROTECT_FSET_REG_CORRECTED_LINK2_PBC_RESP_DATA_FIFO0_0 (0x3601e3), scope: pfe, category: functional, severity: minor, module: ZT[0:0], type: MCIF_RX_ECC5_PROTECT: Corrected: Link2
Sep 10 21:53:35 M480-02 fpc2 Performing action log for error /fpc/2/pfe/0/cm/0/ZT[0:0]/0/ZTCHIP_CMERROR_MCIF_RX_ECC5_PROTECT_FSET_REG_CORRECTED_LINK2_PBC_RESP_DATA_FIFO0_0 (0x3601e3) in module: ZT[0:0] with scope: pfe category: functional level: minor 
Sep 10 21:53:35 M480-02 fpc2 Cmerror Op Set: ZT[0:0]: ZT[0:0]: MCIF Rx: ECC Protect 5: Parity error corrected for Link 2 PBC Response Data FIFO 0_0 (URI: /fpc/2/pfe/0/cm/0/ZT[0:0]/0/ZTCHIP_CMERROR_MCIF_RX_ECC5_PROTECT_FSET_REG_CORRECTED_LINK2_PBC_RESP_DATA_FIFO0_0) 
Sep 10 21:53:35 M480-02 chassisd[11231]: CHASSISD_FPC_ASIC_ERROR: <FPC 2> ASIC Error detected errorno 0x003601e3 (null)
Sep 10 21:53:51 M480-02 fpc2 ztchip_mcif_rx_ecc5_protect_intr_handler(8356): ZT[0:0]: MCIF Rx: ECC Protect 5: Multiple Errors 0x100000 
Sep 10 21:53:51 M480-02 inetd[11238]: Number of tftp connections at max limit (1)
Sep 10 21:53:51 M480-02 fpc2 CMError: /fpc/2/pfe/0/cm/0/ZT[0:0]/0/ZTCHIP_CMERROR_MCIF_RX_ECC5_PROTECT_FSET_REG_DETECTED_LINK2_PBC_RESP_DATA_FIFO0_0 (0x3601d7), scope: pfe, category: functional, severity: major, module: ZT[0:0], type: MCIF_RX_ECC5_PROTECT: Detected: Link2 P
Sep 10 21:53:51 M480-02 fpc2 Performing action get-state for error /fpc/2/pfe/0/cm/0/ZT[0:0]/0/ZTCHIP_CMERROR_MCIF_RX_ECC5_PROTECT_FSET_REG_DETECTED_LINK2_PBC_RESP_DATA_FIFO0_0 (0x3601d7) in module: ZT[0:0] with scope: pfe category: functional level: major 
Sep 10 21:54:19 M480-02 fpc2 platform_zt_module_get_state_ack_cb: module id:25 action 2 error-code 3601d7 ack 0 timed out 
Sep 10 21:54:19 M480-02 fpc2 Performing action cmalarm for error /fpc/2/pfe/0/cm/0/ZT[0:0]/0/ZTCHIP_CMERROR_MCIF_RX_ECC5_PROTECT_FSET_REG_DETECTED_LINK2_PBC_RESP_DATA_FIFO0_0 (0x3601d7) in module: ZT[0:0] with scope: pfe category: functional level: major 
Sep 10 21:54:19 M480-02 fpc2 Performing action disable-pfe for error /fpc/2/pfe/0/cm/0/ZT[0:0]/0/ZTCHIP_CMERROR_MCIF_RX_ECC5_PROTECT_FSET_REG_DETECTED_LINK2_PBC_RESP_DATA_FIFO0_0 (0x3601d7) in module: ZT[0:0] with scope: pfe category: functional level: major 
Sep 10 21:54:19 M480-02 fpc2 PFE 0: 'PFE Disable' action performed. Bringing down ifd et-2/0/0 189 
Sep 10 21:54:19 M480-02 fpc2 PFE 0: 'PFE Disable' action performed. Bringing down ifd et-2/0/1 190 
Sep 10 21:54:19 M480-02 alarmd[11717]: Alarm set: FPC id=150995560, color=RED, class=CHASSIS, reason=FPC 2 Major Errors
Sep 10 21:54:19 M480-02 craftd[11234]: Major alarm set, FPC 2 Major Errors
Sep 10 21:54:19 M480-02 fpc2 PFE 0: 'PFE Disable' action performed. Bringing down ifd et-2/0/2 191 
Sep 10 21:54:19 M480-02 fpc2 PFE 0: 'PFE Disable' action performed. Bringing down ifd et-2/0/3 192 

The above log show that it a memory parity error on the ZTCHIP causing Major FPC error.

• Ideally these kind of memory errors occurs due to transient hardware issues with the chipset

• These memory corruptions have been fixed but since this is a major alarm, the PFEs have been disabled by the software to avoid further issues on the FPC.

• The PFEs can be enabled by rebooting the FPC.

• No RMA for the FPC is needed if the issue occurs once and is not repeated frequently.