This article describes what can happen when a PIC is improperly inserted into a slot on the M10i device: the neighboring PIC can malfunction.
When you insert a PIC into the slot on an M10i device, the PIC should be aligned with the guide located at the bottom of the PIC slot. If not, the PIC could get stuck. If an improperly inserted PIC touches or squeezes the neighboring PIC, the neighboring PIC can malfunction, resulting in error logs showing a hardware issue that doesn't actually exist. The example below shows errors logged after a PIC (#1/2) was improperly inserted on an M10i device, causing the neighboring PIC (#1/1 PE-10CHE1-RJ48-QPP) to malfunction. PIO Read error and liu pmon update failed logs were repeatedly generated until PIC(#1/1) was reset.
Jun 30 01:14:26 SNGPC-ER2 cfeb CMS: %PFE-3: PIC 1/1 PIO Read error, address 0x5806 Jun 30 01:14:26 SNGPC-ER2 cfeb QCDS1-1/1/0: %PFE-3: liu pmon update failed Jun 30 01:14:26 SNGPC-ER2 cfeb QCDS1-1/1/1: %PFE-3: liu pmon update failed Jun 30 01:14:26 SNGPC-ER2 cfeb QCDS1-1/1/2: %PFE-3: liu pmon update failed Jun 30 01:14:26 SNGPC-ER2 cfeb QCDS1-1/1/3: %PFE-3: liu pmon update failed Jun 30 01:14:26 SNGPC-ER2 cfeb QCDS1-1/1/4: %PFE-3: liu pmon update failed Jun 30 01:14:26 SNGPC-ER2 cfeb QCDS1-1/1/5: %PFE-3: liu pmon update failed Jun 30 01:14:26 SNGPC-ER2 cfeb QCDS1-1/1/6: %PFE-3: liu pmon update failed Jun 30 01:14:26 SNGPC-ER2 cfeb QCDS1-1/1/7: %PFE-3: liu pmon update failed Jun 30 01:14:26 SNGPC-ER2 cfeb QCDS1-1/1/8: %PFE-3: liu pmon update failed Jun 30 01:14:26 SNGPC-ER2 cfeb QCDS1-1/1/9: %PFE-3: liu pmon update failed …… Jun 30 08:21:10 SNGPC-ER2 cfeb CMS: %PFE-3: PIC 1/1 PIO Read error, address 0x5806 Jun 30 08:21:09 SNGPC-ER2 cfeb QCDS1-1/1/0: %PFE-3: liu pmon update failed Jun 30 08:21:10 SNGPC-ER2 cfeb QCDS1-1/1/1: %PFE-3: liu pmon update failed Jun 30 08:21:10 SNGPC-ER2 cfeb QCDS1-1/1/2: %PFE-3: liu pmon update failed Jun 30 08:21:10 SNGPC-ER2 cfeb QCDS1-1/1/3: %PFE-3: liu pmon update failed Jun 30 08:21:10 SNGPC-ER2 cfeb QCDS1-1/1/4: %PFE-3: liu pmon update failed Jun 30 08:21:10 SNGPC-ER2 cfeb QCDS1-1/1/5: %PFE-3: liu pmon update failed Jun 30 08:21:10 SNGPC-ER2 cfeb QCDS1-1/1/6: %PFE-3: liu pmon update failed Jun 30 08:21:10 SNGPC-ER2 cfeb QCDS1-1/1/7: %PFE-3: liu pmon update failed Jun 30 08:21:10 SNGPC-ER2 cfeb QCDS1-1/1/8: %PFE-3: liu pmon update failed Jun 30 08:21:10 SNGPC-ER2 cfeb QCDS1-1/1/9: %PFE-3: liu pmon update failed Jun 30 08:21:11 SNGPC-ER2 cfeb CMS: %PFE-3: PIC 1/1 PIO Read error, address 0x5806 Jun 30 08:21:11 SNGPC-ER2 cfeb QCDS1-1/1/7: %PFE-3: liu pmon update failed Jun 30 08:21:11 SNGPC-ER2 cfeb QCDS1-1/1/8: %PFE-3: liu pmon update failed Jun 30 08:21:11 SNGPC-ER2 cfeb QCDS1-1/1/9: %PFE-3: liu pmon update failed
Jun 30 01:14:26 SNGPC-ER2 cfeb CRC error on bdx 0 bd32 1 bd8 1 pic slot 1 Jun 30 01:14:49 SNGPC-ER2 cfeb CRC error on bdx 0 bd32 1 bd8 1 pic slot 1 Jun 30 01:14:49 SNGPC-ER2 cfeb CRC error on bdx 0 bd32 1 bd8 1 pic slot 1
Note that the above error log depends on PIC types. For example, if the affected PIC is PE-10CHE1-RJ48-QPP , both PIO Read error and liu pmon update failed will appear in the syslog, while only the PIO Read error will be reported if the affected PIC is PE-1GE-SFP-QPP. Dec 6 11:43:34 m10i-a-re0 cfeb CMFPC: PIC 0/2 PIO Read error, address 0x000a Dec 6 11:43:34 m10i-a-re0 cfeb CMFPC: PIC 0/2 PIO Read error, address 0x0024 Dec 6 11:43:35 m10i-a-re0 cfeb CMFPC: PIC 0/2 PIO Read error, address 0x2c02 Dec 6 11:43:36 m10i-a-re0 cfeb CMFPC: PIC 0/2 PIO Read error, address 0x0a00 Note : Platforms in which the PIC slot has no physical partition panel for safety protection are prone to this issue when a PIC is improperly inserted. The M10i platform is an example of one of these platforms.
Dec 6 11:43:34 m10i-a-re0 cfeb CMFPC: PIC 0/2 PIO Read error, address 0x000a Dec 6 11:43:34 m10i-a-re0 cfeb CMFPC: PIC 0/2 PIO Read error, address 0x0024 Dec 6 11:43:35 m10i-a-re0 cfeb CMFPC: PIC 0/2 PIO Read error, address 0x2c02 Dec 6 11:43:36 m10i-a-re0 cfeb CMFPC: PIC 0/2 PIO Read error, address 0x0a00 Note : Platforms in which the PIC slot has no physical partition panel for safety protection are prone to this issue when a PIC is improperly inserted. The M10i platform is an example of one of these platforms.
This issue is due to improper PIC insertion. It is not a software or hardware issue. Only the functional neighboring PIC is affected.
Reset the affected PIC , from offline to online, as in the following example:
> request chassis pic fpc-slot 1 pic-slot 1 offline
FPC 1/PIC 1 offline initiated; use show chassis fpc pic-status to verify.
> request chassis pic fpc-slot 1 pic-slot 1 online
FPC 1/PIC 1 online initiated; use show chassis fpc pic-status to verify.
> show log messages | last |match "PIO Read error" > show log messages | last | match "liu pmon update failed" > show log messages | last | match "cfeb CRC error on bdx "
Note : Remember to reseat the improperly inserted PIC into the proper position.